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Current Reversal Guard on Parallel Lines

ANSI 85

What current reversal guard is in POTT and DCB schemes, why a healthy parallel line trips without it, and how it is set and tested.

By Shadai García, electrical engineer, founder and CEO of Tiza Group. Reviewed by the Tiza Group engineering team · .

ABL1 (protected)L2A1B1channelA2B2B2 opens: current on L1 reversesarrow: current direction on L1fault on L2 near BL1 stays in service: the guard prevented the tripA1 sees forward: sendsB1 sees reverse: arms guardB2 opens (fault on L2)permission still reaches B1guard blocks B1A2 clears the faulttthe guard outlasts the permission dropoutIEC 61850PDISPSCHPTRCXCBR© tizagrp.comABL1 (protected)L2A1B1channelA2B2B2 opens: current on L1 reversesarrow: current direction on L1fault on L2 near BL1 stays in service: the guard prevented the tripA1 sees forward: sendsB1 sees reverse: arms guardB2 opens (fault on L2)permission still reaches B1guard blocks B1A2 clears the faulttthe guard outlasts the permission dropoutIEC 61850PDISPSCHPTRCXCBR© tizagrp.com
Current reversal guard: parallel lines without false trips. Location in the system, operating principle and IEC 61850. Illustrative: actual values come from the nameplate and the manufacturer's manual.
Short answer

Current reversal guard is a logic of overreaching schemes (POTT, DCUB and DCB) that prevents tripping a healthy parallel line when the current changes direction as a fault on the neighbouring line is cleared. If a reverse element has been picked up for a minimum time, the logic keeps the send and the scheme trip blocked for a few cycles after it resets.

The problem it solves

On two parallel lines between substations A and B, a fault on one of them also drives current through the other. Call L1 the healthy line, protected by a POTT scheme, and L2 the faulted line, with the fault near B.

  1. During the fault: on L1 the current flows from A to B and on to the fault through bus B. The L1 relay at A sees the fault forward (within its overreach) and sends permission. The L1 relay at B sees it reverse and blocks. L1 does not trip: correct.
  2. The L2 breaker at B opens first. The fault is now fed only from the L2 terminal at A. The contribution from substation B reaches it by travelling along L1 to bus A, so the current on L1 reverses: it flows from B to A.
  3. The race: the L1 relay at B now sees the fault forward, while the permission sent by A has not yet reset in the channel. If its overreach picks up before the permission drops, it trips the healthy L1.

This race between the reset at one terminal and the pickup at the other is current reversal. It occurs in permissive overreaching schemes and in blocking schemes, and it is one of the complementary logics described in teleprotection schemes.

How the guard works

The guard relies on the relay’s reverse elements:

  • If a reverse element has been picked up for longer than a pickup time (of the order of one cycle, according to an SEL technical paper), the logic concludes that there is an external fault.
  • While it is active, and for an additional dropout time (of the order of several cycles) after the reverse element resets, the guard blocks the permissive send and the scheme trip.

In the example, the L1 relay at B saw the fault in the reverse direction throughout the fault. When the current reverses, the guard prevents it from tripping or sending permission for a few cycles, long enough for the permission from A to reset in the channel and for A, which now sees the fault in reverse, to stop sending.

Current reversal on the healthy line L1
  1. 01During the faultL1 at A sees the fault forward and sends permission; L1 at B sees it reverse
  2. 02L2 opens at BThe fault is fed only from the L2 terminal at A
  3. 03ReversalThe current on L1 now flows from B to A
  4. 04RaceL1 at B sees the fault forward while the permission from A is still present
  5. 05GuardBlocks send and trip for the dropout time until the permission drops

Some designs use the reverse element to override the forward element instantaneously, even phase by phase, before the pickup time expires. And for faults that evolve from external to internal, some reset the guard when distance zone 1 sees the fault, so that the trip is not lost.

In DCB the problem is the same with the opposite sign: the terminal that was sending a block stops seeing the fault in reverse and stops blocking, while the other terminal starts seeing it forward. The solution is to extend the block for a time after the reverse element resets, combined with the coordination timer of the DCB scheme.

Siemens calls this logic transient blocking, with adjustable waiting and blocking times, and applies it to both permissive and blocking schemes; other manufacturers call it current reversal logic or current reversal guard.

Channel and timing

The guard setting depends on the channel: the dropout time must exceed the time the permission takes to stop arriving at the other terminal, plus the reset of the remote forward element and a margin. A channel with variable delay, or with signal extension in the teleprotection equipment, lengthens that time. If the channel is lost, the scheme stops accelerating and the guard has no effect.

Advantages and limitations

Advantages: it prevents false trips of the healthy line on double circuits and in meshed networks with parallel paths, without reducing the reaches.

Limitations: it delays by a few cycles the trip for an internal fault that appears right after an external one, unless the logic resets the guard with zone 1. It depends on the reverse element seeing every external fault that the remote overreach sees.

Where it is used

On every high- or extra-high-voltage line with an overreaching scheme and a parallel path: double circuits on the same tower, parallel lines on different corridors and closed rings. It is not usually needed in PUTT, because the signal is keyed by a zone 1 that does not see external faults.

How each manufacturer implements it

SEL (AcSELerator QuickSet) implements the guard with pickup and dropout timers inside its scheme logic. Siemens SIPROTEC 4 7SA (DIGSI) includes it as transient blocking associated with teleprotection. Hitachi Energy Relion 670 (PCM600) groups it with the weak-end infeed logic in a dedicated block (ZCRWPSCH). GE Vernova (Multilin, EnerVista) offers current reversal logic in its pilot schemes. The MiCOM P44x (GE Vernova MiCOM Agile and Schneider Electric Easergy MiCOM) call it current reversal guard within their aided schemes. Names, the elements that start it and the default times differ.

Why it fails or misoperates

  • Healthy line trips: guard disabled, dropout time shorter than the channel reset, or a reverse element with less reach than the remote overreach.
  • Slow trip for an evolving fault: guard without zone 1 reset.
  • Trip after reclosing on the neighbouring line: sequences in which the guard has already reset.

Check the oscillography of both terminals of the healthy line and the opening order of the faulted line’s breakers.

How it is tested

Secondary injection simulates the complete sequence: a reverse fault for a time and then the same fault forward, verifying that there is no send and no trip during the dropout time. A GPS-synchronised end-to-end test reproduces the reversal with both terminals and the real channel.

Did your healthy line trip when the parallel one faulted? At Tiza Group we analyse the events and the current reversal logic remotely. See our remote relay configuration service or contact us.

References

  • Kasztenny, Mynam, Fischer and Guzmán, Permissive or Blocking Pilot Protection Schemes? How to Have It Both Ways, SEL, Western Protective Relay Conference, 2020.
  • IEEE C37.113-2025, Guide for Protective Relay Applications to Transmission Lines.
  • CIGRE, Technical Brochure 192, Protection using telecommunications (2001).
  • Blackburn and Domin, Protective Relaying: Principles and Applications.

Frequently asked questions

Why can a healthy parallel line trip in a POTT scheme?

Because when one breaker of the faulted line opens first, the current in the healthy line reverses. The terminal that saw the fault in the reverse direction now sees it forward while the permission sent by the other terminal is still arriving, and it trips.

How is current reversal guard set?

It has a pickup time, of the order of one cycle, which requires the reverse element to have seen the fault, and a dropout time of several cycles that must cover the reset of the permission in the channel and of the remote forward element. The values come from the actual channel time and from the manufacturer.

Does current reversal guard delay trips for internal faults?

Only if a reverse element was picked up beforehand. For faults that evolve from external to internal, some designs reset the guard when zone 1 sees the fault, so that the trip is not lost.

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